Field
This disclosure relates generally to semiconductor devices, and more specifically, to forming a core via structure in packaged semiconductor devices.
Related Art
Typical substrate core via structures are fabricated through a serial process that is limited by the time it takes to individually drill and plate each via. In many applications, the processing limitations in creating higher core via counts severely restrict design and price elements.
The present invention is illustrated by way of example and is not limited by the accompanying figures, in which like references indicate similar elements, unless otherwise noted. Elements in the figures are illustrated for simplicity and clarity and have not necessarily been drawn to scale.